1. Field of the Invention
This invention relates to enhancing time resynchronization at a integrated circuit serial interface.
2. Description of the Related Art
Timing of clock pulses received at a serial port or interface may, from time to time, lose synchronization with the timing of clock pulses received or generated at a microprocessor with which the interface is associated. When time synchronization is lost at an interface, the controller often does not become promptly aware of this loss, with the result that the interface operates without synchronization to the remainder of the system for many cycles. Where timing differences of one or more cycles are critical and synchronization is lost at an interface, the system controller may refuse to recognize or respond to signals from such an interface.
What is needed is an approach that promptly allows the serial interface to advise the microprocessor if the interface timing is not synchronized to the microprocessor timing, and to allow the microprocessor to promptly resynchronize the timing of the interface, if resynchronization is needed. Preferably, the approach should facilitate timing resynchronization, if desired, after each command is received by the serial interface.
These needs are met by the invention, which uses an input serial interface and an output serial interface, whose operations are synchronized, to perform certain operations in tandem and to thus achieve some of the benefits of a parallel port or interface, such as faster processing of groups of bits representing a digital signal. In one embodiment, each time, or at selected times, the serial interface receives a command, the interface determines whether the command is a valid command, by comparing the bit pattern provided by the microprocessor with the bit patterns understood by the serial interface itself. If the received command is not a valid command, because the bit pattern does not match at least one stored template, the serial interface communicates a unique signal indicating that this mismatch has occurred to the microprocessor, which then issues a Timing Resynchronization command to the serial interface.